? semiconductor components industries, llc, 2012 january, 2012 ? rev. 0 1 publication order number: 1n5929brn/d 1n59xxbrng series 3 w do-41 surmetic 30 zener voltage regulators this is a 1n59xxbrng series with limits and excellent operating characteristics that reflect the superior capabilities of silicon ? oxide passivated junctions. all this in an axial ? lead, transfer ? molded plastic package that offers protection in all common environmental conditions. features ? zener voltage range ? 3.3 v to 200 v ? esd rating of class 3 (>16 kv) per human body model ? surge rating of 98 w @ 1 ms ? maximum limits guaranteed on up to six electrical parameters ? package no larger than the conventional 1 w package ? this is a pb ? free device mechanical characteristics case: void free, transfer ? molded, thermosetting plastic finish: all external surfaces are corrosion resistant and leads are readily solderable maximum lead temperature for soldering purposes: 260 c, 1/16 from the case for 10 seconds polarity: cathode indicated by polarity band mounting position: any maximum ratings rating symbol value unit max. steady state power dissipation @ t l = 75 c, lead length = 3/8 derate above 75 c p d 3.0 24 w mw/ c steady state power dissipation @ t a = 50 c derate above 50 c p d 1.0 6.67 w mw/ c operating and storage temperature range t j , t stg ? 65 to +200 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. device package shipping ? ordering information 1n59xxbrng axial lead (pb ? free) axial lead case 59ab style 1 3000 units / box cathode anode marking diagram ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. http://onsemi.com a = assembly location 1n59xxr = device number yy = year ww = work week = pb ? free package (note: microdot may be in either location) a 1n 59xxr yyww
zener voltage regulator i f v i i r i zt v r v z v f 1n59xxbrng series http://onsemi.com 2 electrical characteristics (t l = 30 c unless otherwise noted, v f = 1.5 v max @ i f = 200 madc for all types) symbol parameter v z reverse zener voltage @ i zt i zt reverse current z zt maximum zener impedance @ i zt i zk reverse current z zk maximum zener impedance @ i zk i r reverse leakage current @ v r v r breakdown voltage i f forward current v f forward voltage @ i f i zm maximum dc zener current
1n59xxbrng series http://onsemi.com 3 electrical characteristics (t l = 30 c unless otherwise noted, v f = 1.5 v max @ i f = 200 madc for all types) device ? (note 1) device marking zener voltage (note 2) zener impedance (note 3) leakage current i zm v z (volts) @ i zt z zt @ i zt z zk @ i zk i r @ v r min nom max ma ma a max volts ma 1N5929BRNG 1n5929r 14.25 15 15.75 25.0 9 600 0.25 1 11.4 100 1n5932brng 1n5932r 19.00 20 21.00 18.7 14 650 0.25 1 15.2 75 1n5934brng 1n5934r 22.80 24 25.20 15.6 19 700 0.25 1 18.2 62 ?the ?g?? suffix indicates pb ? free package available. 1. tolerance and type number designation tolerance designation ? device tolerance of 5% are indicated by a ?b? suffix. 2. zener voltage (v z ) measurement on semiconductor guarantees the zener voltage when measured at 90 seconds while maintaining the lead temperature (t l ) at 30 c 1 c, 3/8 from the diode body. 3. zener impedance (z z ) derivation the zener impedance is derived from 60 seconds ac voltage, which results when an ac current having an rms value equal to 10% of the dc zener current (i zt or i zk ) is superimposed on i zt or i zk . figure 1. power temperature derating curve t l , lead temperature ( c) 0 20 40 60 200 80 100 120 140 160 180 0 1 2 3 4 5 l = 3/8 p d , steady state dissipation (watts) l = lead length to heat sink
1n59xxbrng series http://onsemi.com 4 10 20 30 50 100 200 300 500 1k 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 pw, pulse width (ms) p , peak surge power (watts) pk 1 2 5 10 20 50 100 200 400 1000 0.0003 0.0005 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 2 3 t a = 125 c t a = 125 c nominal v z (volts) as specified in elec. char. table figure 2. typical thermal response l, lead length = 3/8 inch figure 3. maximum surge power figure 4. typical reverse leakage i r , reverse leakage ( adc) @ v r rectangular nonrepetitive waveform t j =25 c prior to initial pulse 0.5 jl (t, d), transient thermal resistance junction\to\lead ( c/w) 0.01 0.0000001 duty cycle, d = t 1 /t 2 single pulse t jl = jl (t)p pk repetitive pulses t jl = jl (t,d)p pk jl (t,d) = d * jl ( )+(1 ? d) * jl (t) [where jl (t) is d = 0 curve] p pk t 1 t 2 t, time (seconds) 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 0.1 1 10 100 d = 0 0.2 0.1 0.05 0.02 0.01
1n59xxbrng series http://onsemi.com 5 application note since the actual voltage available from a given zener diode is temperature dependent, it is necessary to determine junction temperature under any set of operating conditions in order to calculate its value. the following procedure is recommended: lead temperature, t l , should be determined from: t l = la p d + t a la is the lead-to-ambient thermal resistance ( c/w) and p d is the power dissipation. the value for la will vary and depends on the device mounting method. la is generally 30 ? 40 c/w for the various clips and tie points in common use and for printed circuit board wiring. the temperature of the lead can also be measured using a thermocouple placed on the lead as close as possible to the tie point. the thermal mass connected to the tie point is normally large enough so that it will not significantly respond to heat surges generated in the diode as a result of pulsed operation once steady-state conditions are achieved. using the measured value of t l , the junction temperature may be determined by: t j = t l + t jl t jl is the increase in junction temperature above the lead temperature and may be found from figure 2 for a train of power pulses (l = 3/8 inch) or from figure 10 for dc power. t jl = jl p d for worst-case design, using expected limits of i z , limits of p d and the extremes of t j ( t j ) may be estimated. changes in voltage, v z , can then be found from: v = vz t j vz , the zener voltage temperature coefficient, is found from figures 5 and 6. under high power-pulse operation, the zener voltage will vary with time and may also be affe cted significantly by the zener resistance. for best regulation, keep current excursions as low as possible. data of figure 2 should not be used to compute surge capability. surge limitations are given in figure 3. they are lower than would be expected by considering only junction temperature, as current crowding ef fects cause temperatures to be extremely high in small spots resulting in device degradation should the limits of figure 3 be exceeded.
1n59xxbrng series http://onsemi.com 6 figure 5. units to 12 volts figure 6. units 10 to 400 volts figure 7. v z = 3.3 thru 10 volts figure 8. v z = 12 thru 82 volts figure 9. v z = 100 thru 400 volts figure 10. typical thermal resistance zener voltage versus zener current (figures 7, 8 and 9) temperature coefficient ranges (90% of the units are in the ranges indicated) v z , zener voltage @ i zt (volts) 34 5 6 789101112 10 8 6 4 2 0 -2 -4 range , temperature coefficient (mv/ c) @ i zt vz 1000 500 200 100 50 20 10 10 20 50 100 200 400 1000 v z , zener voltage @ i zt (volts) , temperature coefficient (mv/ c) @ i zt vz 01 234 56 7 8910 100 50 30 20 10 1 0.5 0.3 0.2 0.1 v z , zener voltage (volts) i , zener current (ma) z 2 5 3 0102030405060708090100 v z , zener voltage (volts) i , zener current (ma) z 100 50 30 20 10 1 0.5 0.3 0.2 0.1 2 5 3 100 200 300 400 250 350 150 10 1 0.5 0.2 0.1 v z , zener voltage (volts) 2 5 i , zener current (ma) z 0 10 20 30 40 50 60 70 80 l, lead length to heat sink (inch) equal conduction through each lead 0 1/8 1/4 3/8 1/2 5/8 3/4 7/8 1 t l jl , junction\to\lead thermal resistance l l ( c/w)
1n59xxbrng series http://onsemi.com 7 package dimensions axial lead case 59ab issue o b d k k f f a dim min max min max millimeters inches a 4.10 5.20 0.161 0.205 b 2.00 2.70 0.079 0.106 d 0.71 0.86 0.028 0.034 f ??? 1.27 ??? 0.050 k 13.70 ??? 0.540 ??? notes: 1. controlling dimension: inches. 2. package contour is optional within dimensions a and b. heat slugs, if any, shall be within dimension b but not subject to its minimum value. 3. dimension a defines the entire body including heat slugs. 4. dimension b is measured at the maximum diameter of the body. 5. polarity shall be denoted by a cathode band. 6. lead diameter, d, is not controlled in zone f. 7. all rules and notes associated with jedec do ? 41 outline shall apply style 1: pin 1. cathode (polarity band) 2. anode polarity indicator optional as needed (see styles) on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. 1n5929brn/d surmetic is a trademark of semiconductor components industries, llc (scillc). publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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